/*----------------------------------------------------------------------
  - File name      : STC8Ax_GPIO.h
  - Author         : Quark Team
  - Update date    : 2020-12-09                   
  -	Copyright      : Gevico Electronic studio   
  - Module comments: Header file of gpio module.
-----------------------------------------------------------------------*/
#ifndef __STC8Ax_GPIO_H_
#define __STC8Ax_GPIO_H_
/*-----------------------------------------------------------------------
|                               INCLUDES                                |
-----------------------------------------------------------------------*/
/*--------------------------------------------------------
| @Description: STC8Ax Options                           |
--------------------------------------------------------*/
#include "STC8Ax_REG.h"   
/*--------------------------------------------------------
| @Description: STC8Ax core                              |
--------------------------------------------------------*/
#include "STC8Ax_CORE.h"
/*-----------------------------------------------------------------------
|                                 DATA                                  |
-----------------------------------------------------------------------*/

/*--------------------------------------------------------
| @Description: GPIO Pin define                          |
--------------------------------------------------------*/

/* Pin */
#define	Pin_0    0x01  //IO Pin Px.0
#define	Pin_1    0x02  //IO Pin Px.1
#define	Pin_2    0x04  //IO Pin Px.2
#define	Pin_3    0x08  //IO Pin Px.3
#define	Pin_4    0x10  //IO Pin Px.4
#define	Pin_5    0x20  //IO Pin Px.5
#define	Pin_6    0x40  //IO Pin Px.6
#define	Pin_7    0x80  //IO Pin Px.7
#define	Pin_All  0xFF  //IO All  Pin	

/*--------------------------------------------------------
| @Description: Peripheral IO define                     |
--------------------------------------------------------*/

typedef enum
{
	SW_PORT1 = 0x00 ,
	SW_PORT2 = 0x01 ,
	SW_PORT3 = 0x02 ,
	SW_PORT4 = 0x03 
} GPIOSWPort_Type;

/*--------------------------------------------------------
| @Description: GPIO mode enum type                      |
--------------------------------------------------------*/

typedef enum
{
	GPIO_WEAK_PULL = 0x01, /* */
	GPIO_IN_FLOATING, /* */
	GPIO_OUT_OD, /*  */   
	GPIO_OUT_PP  /*  */
} GPIOMode_Type;

/*--------------------------------------------------------
| @Description: GPIO level conversion speed enum type    |
--------------------------------------------------------*/

typedef enum
{
	SPEED_HIGH = 0x01, SPEED_LOW = 0x02
} GPIOSpeed_Type;

/*--------------------------------------------------------
| @Description: GPIO drive curren enum type              |
--------------------------------------------------------*/

typedef enum
{
	DRIVE_HIGH = 0x01, DRIVE_MEDIUM = 0x02
} GPIODrive_Type;

/*-----------------------------------------------------------------------
|                             API FUNCTION                              |
-----------------------------------------------------------------------*/

/*--------------------------------------------------------
| @Description: GPIO control define function             |
--------------------------------------------------------*/

#define  P0_MODE_WEAK_PULL(Pin)   P0M1 &= ~(Pin), P0M0 &= ~(Pin);
#define  P1_MODE_WEAK_PULL(Pin)   P1M1 &= ~(Pin), P1M0 &= ~(Pin);
#define  P2_MODE_WEAK_PULL(Pin)   P2M1 &= ~(Pin), P2M0 &= ~(Pin);
#define  P3_MODE_WEAK_PULL(Pin)   P3M1 &= ~(Pin), P3M0 &= ~(Pin);
#define  P4_MODE_WEAK_PULL(Pin)   P4M1 &= ~(Pin), P4M0 &= ~(Pin);
#define  P5_MODE_WEAK_PULL(Pin)   P5M1 &= ~(Pin), P5M0 &= ~(Pin);
#define  P6_MODE_WEAK_PULL(Pin)   P6M1 &= ~(Pin), P6M0 &= ~(Pin);
#define  P7_MODE_WEAK_PULL(Pin)   P7M1 &= ~(Pin), P7M0 &= ~(Pin);

#define  P0_MODE_IN_FLOATING(Pin)  P0M1 |= (Pin), P0M0 &= ~(Pin);
#define  P1_MODE_IN_FLOATING(Pin)  P1M1 |= (Pin), P1M0 &= ~(Pin);
#define  P2_MODE_IN_FLOATING(Pin)  P2M1 |= (Pin), P2M0 &= ~(Pin);
#define  P3_MODE_IN_FLOATING(Pin)  P3M1 |= (Pin), P3M0 &= ~(Pin);
#define  P4_MODE_IN_FLOATING(Pin)  P4M1 |= (Pin), P4M0 &= ~(Pin);
#define  P5_MODE_IN_FLOATING(Pin)  P5M1 |= (Pin), P5M0 &= ~(Pin);
#define  P6_MODE_IN_FLOATING(Pin)  P6M1 |= (Pin), P6M0 &= ~(Pin);
#define  P7_MODE_IN_FLOATING(Pin)  P7M1 |= (Pin), P7M0 &= ~(Pin);

#define  P0_MODE_OUT_OD(Pin)        P0M1 |= (Pin), P0M0 |= (Pin);
#define  P1_MODE_OUT_OD(Pin)        P1M1 |= (Pin), P1M0 |= (Pin);
#define  P2_MODE_OUT_OD(Pin)        P2M1 |= (Pin), P2M0 |= (Pin);
#define  P3_MODE_OUT_OD(Pin)        P3M1 |= (Pin), P3M0 |= (Pin);
#define  P4_MODE_OUT_OD(Pin)        P4M1 |= (Pin), P4M0 |= (Pin);
#define  P5_MODE_OUT_OD(Pin)        P5M1 |= (Pin), P5M0 |= (Pin);
#define  P6_MODE_OUT_OD(Pin)        P6M1 |= (Pin), P6M0 |= (Pin);
#define  P7_MODE_OUT_OD(Pin)        P7M1 |= (Pin), P7M0 |= (Pin);

#define  P0_MODE_OUT_PP(Pin)       P0M1 &= ~(Pin), P0M0 |= (Pin);
#define  P1_MODE_OUT_PP(Pin)       P1M1 &= ~(Pin), P1M0 |= (Pin);
#define  P2_MODE_OUT_PP(Pin)       P2M1 &= ~(Pin), P2M0 |= (Pin);
#define  P3_MODE_OUT_PP(Pin)       P3M1 &= ~(Pin), P3M0 |= (Pin);
#define  P4_MODE_OUT_PP(Pin)       P4M1 &= ~(Pin), P4M0 |= (Pin);
#define  P5_MODE_OUT_PP(Pin)       P5M1 &= ~(Pin), P5M0 |= (Pin);
#define  P6_MODE_OUT_PP(Pin)       P6M1 &= ~(Pin), P6M0 |= (Pin);
#define  P7_MODE_OUT_PP(Pin)       P7M1 &= ~(Pin), P7M0 |= (Pin);

/*--------------------------------------------------------
| @Description: GPIO pull up control define              |
--------------------------------------------------------*/

#define P0_PULL_UP_ENABLE(Pin)    {EAXFR_ENABLE(); PxPU(P0PU_ADDRESS) |= (Pin); EAXFR_DISABLE();}
#define P1_PULL_UP_ENABLE(Pin)    {EAXFR_ENABLE(); PxPU(P1PU_ADDRESS) |= (Pin); EAXFR_DISABLE();}
#define P2_PULL_UP_ENABLE(Pin)    {EAXFR_ENABLE(); PxPU(P2PU_ADDRESS) |= (Pin); EAXFR_DISABLE();}
#define P3_PULL_UP_ENABLE(Pin)    {EAXFR_ENABLE(); PxPU(P3PU_ADDRESS) |= (Pin); EAXFR_DISABLE();}
#define P4_PULL_UP_ENABLE(Pin)    {EAXFR_ENABLE(); PxPU(P4PU_ADDRESS) |= (Pin); EAXFR_DISABLE();}
#define P5_PULL_UP_ENABLE(Pin)    {EAXFR_ENABLE(); PxPU(P5PU_ADDRESS) |= (Pin); EAXFR_DISABLE();}
#define P6_PULL_UP_ENABLE(Pin)    {EAXFR_ENABLE(); PxPU(P6PU_ADDRESS) |= (Pin); EAXFR_DISABLE();}
#define P7_PULL_UP_ENABLE(Pin)    {EAXFR_ENABLE(); PxPU(P7PU_ADDRESS) |= (Pin); EAXFR_DISABLE();}

#define P0_PULL_UP_DISABLE(Pin)  {EAXFR_ENABLE(); PxPU(P0PU_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
#define P1_PULL_UP_DISABLE(Pin)  {EAXFR_ENABLE(); PxPU(P1PU_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
#define P2_PULL_UP_DISABLE(Pin)  {EAXFR_ENABLE(); PxPU(P2PU_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
#define P3_PULL_UP_DISABLE(Pin)  {EAXFR_ENABLE(); PxPU(P3PU_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
#define P4_PULL_UP_DISABLE(Pin)  {EAXFR_ENABLE(); PxPU(P4PU_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
#define P5_PULL_UP_DISABLE(Pin)  {EAXFR_ENABLE(); PxPU(P5PU_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
#define P6_PULL_UP_DISABLE(Pin)  {EAXFR_ENABLE(); PxPU(P6PU_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
#define P7_PULL_UP_DISABLE(Pin)  {EAXFR_ENABLE(); PxPU(P7PU_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
																	
/*--------------------------------------------------------
| @Description: GPIO schmidt trigger control define      |
--------------------------------------------------------*/

#define P0_ST_ENABLE(Pin)     {EAXFR_ENABLE(); PxNCS(P0NCS_ADDRESS) |= (Pin); EAXFR_DISABLE();}
#define P1_ST_ENABLE(Pin)     {EAXFR_ENABLE(); PxNCS(P1NCS_ADDRESS) |= (Pin); EAXFR_DISABLE();}
#define P2_ST_ENABLE(Pin)     {EAXFR_ENABLE(); PxNCS(P2NCS_ADDRESS) |= (Pin); EAXFR_DISABLE();}
#define P3_ST_ENABLE(Pin)     {EAXFR_ENABLE(); PxNCS(P3NCS_ADDRESS) |= (Pin); EAXFR_DISABLE();}
#define P4_ST_ENABLE(Pin)     {EAXFR_ENABLE(); PxNCS(P4NCS_ADDRESS) |= (Pin); EAXFR_DISABLE();}
#define P5_ST_ENABLE(Pin)     {EAXFR_ENABLE(); PxNCS(P5NCS_ADDRESS) |= (Pin); EAXFR_DISABLE();}
#define P6_ST_ENABLE(Pin)     {EAXFR_ENABLE(); PxNCS(P6NCS_ADDRESS) |= (Pin); EAXFR_DISABLE();}
#define P7_ST_ENABLE(Pin)     {EAXFR_ENABLE(); PxNCS(P7NCS_ADDRESS) |= (Pin); EAXFR_DISABLE();}

#define P0_ST_DISABLE(Pin)   {EAXFR_ENABLE(); PxNCS(P0NCS_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
#define P1_ST_DISABLE(Pin)   {EAXFR_ENABLE(); PxNCS(P1NCS_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
#define P2_ST_DISABLE(Pin)   {EAXFR_ENABLE(); PxNCS(P2NCS_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
#define P3_ST_DISABLE(Pin)   {EAXFR_ENABLE(); PxNCS(P3NCS_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
#define P4_ST_DISABLE(Pin)   {EAXFR_ENABLE(); PxNCS(P4NCS_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
#define P5_ST_DISABLE(Pin)   {EAXFR_ENABLE(); PxNCS(P5NCS_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
#define P6_ST_DISABLE(Pin)   {EAXFR_ENABLE(); PxNCS(P6NCS_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
#define P7_ST_DISABLE(Pin)   {EAXFR_ENABLE(); PxNCS(P7NCS_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}

/*--------------------------------------------------------
| @Description: GPIO level conversion speed define       |
--------------------------------------------------------*/

#define P0_SPEED_LOW(Pin)      {EAXFR_ENABLE(); PxSR(P0SR_ADDRESS) |= (Pin); EAXFR_DISABLE();} 
#define P1_SPEED_LOW(Pin)      {EAXFR_ENABLE(); PxSR(P1SR_ADDRESS) |= (Pin); EAXFR_DISABLE();} 
#define P2_SPEED_LOW(Pin)      {EAXFR_ENABLE(); PxSR(P2SR_ADDRESS) |= (Pin); EAXFR_DISABLE();} 
#define P3_SPEED_LOW(Pin)      {EAXFR_ENABLE(); PxSR(P3SR_ADDRESS) |= (Pin); EAXFR_DISABLE();} 
#define P4_SPEED_LOW(Pin)      {EAXFR_ENABLE(); PxSR(P4SR_ADDRESS) |= (Pin); EAXFR_DISABLE();} 
#define P5_SPEED_LOW(Pin)      {EAXFR_ENABLE(); PxSR(P5SR_ADDRESS) |= (Pin); EAXFR_DISABLE();} 
#define P6_SPEED_LOW(Pin)      {EAXFR_ENABLE(); PxSR(P6SR_ADDRESS) |= (Pin); EAXFR_DISABLE();} 
#define P7_SPEED_LOW(Pin)      {EAXFR_ENABLE(); PxSR(P7SR_ADDRESS) |= (Pin); EAXFR_DISABLE();} 

#define P0_SPEED_HIGH(Pin)    {EAXFR_ENABLE(); PxSR(P0SR_ADDRESS) &= ~(Pin); EAXFR_DISABLE();} 
#define P1_SPEED_HIGH(Pin)    {EAXFR_ENABLE(); PxSR(P1SR_ADDRESS) &= ~(Pin); EAXFR_DISABLE();} 
#define P2_SPEED_HIGH(Pin)    {EAXFR_ENABLE(); PxSR(P2SR_ADDRESS) &= ~(Pin); EAXFR_DISABLE();} 
#define P3_SPEED_HIGH(Pin)    {EAXFR_ENABLE(); PxSR(P3SR_ADDRESS) &= ~(Pin); EAXFR_DISABLE();} 
#define P4_SPEED_HIGH(Pin)    {EAXFR_ENABLE(); PxSR(P4SR_ADDRESS) &= ~(Pin); EAXFR_DISABLE();} 
#define P5_SPEED_HIGH(Pin)    {EAXFR_ENABLE(); PxSR(P5SR_ADDRESS) &= ~(Pin); EAXFR_DISABLE();} 
#define P6_SPEED_HIGH(Pin)    {EAXFR_ENABLE(); PxSR(P6SR_ADDRESS) &= ~(Pin); EAXFR_DISABLE();} 
#define P7_SPEED_HIGH(Pin)    {EAXFR_ENABLE(); PxSR(P7SR_ADDRESS) &= ~(Pin); EAXFR_DISABLE();} 

/*--------------------------------------------------------
| @Description: GPIO drive current control define        |
--------------------------------------------------------*/

#define P0_DRIVE_MEDIUM(Pin)   {EAXFR_ENABLE(); PxDR(P0DR_ADDRESS) |= (Pin); EAXFR_DISABLE();}
#define P1_DRIVE_MEDIUM(Pin)   {EAXFR_ENABLE(); PxDR(P1DR_ADDRESS) |= (Pin); EAXFR_DISABLE();}
#define P2_DRIVE_MEDIUM(Pin)   {EAXFR_ENABLE(); PxDR(P2DR_ADDRESS) |= (Pin); EAXFR_DISABLE();}
#define P3_DRIVE_MEDIUM(Pin)   {EAXFR_ENABLE(); PxDR(P3DR_ADDRESS) |= (Pin); EAXFR_DISABLE();}
#define P4_DRIVE_MEDIUM(Pin)   {EAXFR_ENABLE(); PxDR(P4DR_ADDRESS) |= (Pin); EAXFR_DISABLE();}
#define P5_DRIVE_MEDIUM(Pin)   {EAXFR_ENABLE(); PxDR(P5DR_ADDRESS) |= (Pin); EAXFR_DISABLE();}
#define P6_DRIVE_MEDIUM(Pin)   {EAXFR_ENABLE(); PxDR(P6DR_ADDRESS) |= (Pin); EAXFR_DISABLE();}
#define P7_DRIVE_MEDIUM(Pin)   {EAXFR_ENABLE(); PxDR(P7DR_ADDRESS) |= (Pin); EAXFR_DISABLE();}

#define P0_DRIVE_HIGH(Pin)    {EAXFR_ENABLE(); PxDR(P0DR_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
#define P1_DRIVE_HIGH(Pin)    {EAXFR_ENABLE(); PxDR(P1DR_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
#define P2_DRIVE_HIGH(Pin)    {EAXFR_ENABLE(); PxDR(P2DR_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
#define P3_DRIVE_HIGH(Pin)    {EAXFR_ENABLE(); PxDR(P3DR_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
#define P4_DRIVE_HIGH(Pin)    {EAXFR_ENABLE(); PxDR(P4DR_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
#define P5_DRIVE_HIGH(Pin)    {EAXFR_ENABLE(); PxDR(P5DR_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
#define P6_DRIVE_HIGH(Pin)    {EAXFR_ENABLE(); PxDR(P6DR_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}
#define P7_DRIVE_HIGH(Pin)    {EAXFR_ENABLE(); PxDR(P7DR_ADDRESS) &= ~(Pin); EAXFR_DISABLE();}

/*--------------------------------------------------------
| @Description: GPIO Pin switching function              |
--------------------------------------------------------*/

/* UART */
FSCSTATE GPIO_UART1_SWPort(GPIOSWPort_Type Port);
FSCSTATE GPIO_UART2_SWPort(GPIOSWPort_Type Port);
FSCSTATE GPIO_UART3_SWPort(GPIOSWPort_Type Port);
FSCSTATE GPIO_UART4_SWPort(GPIOSWPort_Type Port);

/* COMP */
FSCSTATE GPIO_COMP_SWPort(GPIOSWPort_Type Port);

/* PCA */
FSCSTATE GPIO_PCA_SWPort(GPIOSWPort_Type Port);

/* PWM */
FSCSTATE GPIO_PWM0_SWPort(GPIOSWPort_Type Port);
FSCSTATE GPIO_PWM1_SWPort(GPIOSWPort_Type Port);
FSCSTATE GPIO_PWM2_SWPort(GPIOSWPort_Type Port);
FSCSTATE GPIO_PWM3_SWPort(GPIOSWPort_Type Port);
FSCSTATE GPIO_PWM4_SWPort(GPIOSWPort_Type Port);
FSCSTATE GPIO_PWM5_SWPort(GPIOSWPort_Type Port);
FSCSTATE GPIO_PWM6_SWPort(GPIOSWPort_Type Port);
FSCSTATE GPIO_PWM7_SWPort(GPIOSWPort_Type Port);

/* SPI */
FSCSTATE GPIO_SPI_SWPort(GPIOSWPort_Type Port);

/* I2C */
FSCSTATE GPIO_I2C_SWPort(GPIOSWPort_Type Port);

#endif
/*-----------------------------------------------------------------------
|          END OF FLIE        (C) COPYRIGHT Gevico Electronics          | 
-----------------------------------------------------------------------*/

